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Implementation of a Binary Floating Point Fused Multiply-Add Unit
Abdel Aziz Ibrahim Walaa; Aly Fahmy Hossam; Hussien Khalil Ahmed (Author)
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Lap Lambert Academic Publishing
· Paperback
Implementation of a Binary Floating Point Fused Multiply-Add Unit - Abdel Aziz Ibrahim Walaa; Aly Fahmy Hossam; Hussien Khalil Ahmed
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Origin: Spain
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Synopsis "Implementation of a Binary Floating Point Fused Multiply-Add Unit"
The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.
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The book is written in English.
The binding of this edition is Paperback.
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